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Software Engineering
Steven M. Rosenberry, PE
12348 Morning Creek Road
Glen Allen, VA  23059
(610) 670-9090

View Steve Rosenberry's profile on LinkedIn
Seeking a technology leadership position — licensed software engineer and business professional with a reputation for:
  • Designing and delivering high-quality software on schedule
  • Quickly learning and adopting new and diverse technologies
  • Communicating effectively with cross-functional departments,
    all levels of management, and external customers
  • Mentoring and leading team members.
Software Experience
  • History of delivering timely software releases in support of $200MM revenue coordinating software development as well as cross-functional groups including product management, quality assurance, documentation, and manufacturing.
  • Introduced multiple development tools and methodologies increasing team efficiency and software quality.
  • Extensive experience with user interfaces, device drivers, multitasking/multiprocessor real-time software, data/network/TCP/IP communications, and interactive voice response (IVR) systems.
  • Excellent understanding of the embedded microprocessor environment including specification, development, software and hardware debugging techniques, and QA testing.
  • Proven skill in commercializing R&D projects and translating doctoral theses to functional software implementations.
  • Expert in Java with proficiency in Swing, Spring, Hibernate, JUnit, and Groovy.
  • Expert in C++ and C with proficiency in Standard Template Library (STL), Boost, Microsoft Foundation Classes (MFC), Google Test, and Google Protocol Buffers.
  • Proficient to expert in Apache Spark technologies.
  • Proficient in JavaScript, HTML, XHTML, XML, XSLT.
  • Proficient in SQL and database usage and functionality.
  • Familiar with AWS Cloud Technologies with AWS CSAA certification, 2019.
  • Familiar with CSS, TypeScript, Angular.js, and Node.js.
  • Familiar with C#, Visual Basic, Microsoft .NET, and FORTRAN.
Hardware Experience
  • Experience includes design, debug, and simulation of digital electronics.
  • Can communicate effectively with hardware designers using their terminology.
  • Knowledge of various ASIC/FPGA hardware description languages (HDL) including VHDL, Verilog, SystemVerilog, and SystemC.
Other Abilities
  • Possess excellent communication and inter-personal skills.
  • Learn, apply, and build upon new concepts quickly.
  • Perform effectively in high-pressure situations.
  • Functional understanding and experience in all business arenas including strategic, marketing, financial, and janitorial.
  • Master of Business Administration (MBA), Lehigh University, 1985.
  • Bachelor of Science in Electrical Engineering (BSEE), Lehigh University, 1982.
  • AWS Certified Solutions Architect - Associate, 2019
  • Certificate from IBM Watson Data Analytics 101, 2017
  • Professional Engineering License in Commonwealth of PA, 1987
  • Patent 5,349,682, issued 1994, titled "Dynamic fault-tolerant parallel processing system for performing an application function with increased efficiency using heterogeneous processors." 135 patents issued to 3rd parties reference this patent.
  • Patent 10,069,763, issued 2018, titled "Method to establish a non-disruptive communications path between multiple devices."
  • Patent 10,009,254, issued 2018, titled "Calculation of a lowest cost path."
  • Received a Top-Ten Instructor Award at the 2006 Custom Electronic Design and Installation Association (CEDIA) Expo – a trade show attended by more than 30,000 people
  • CEDIA Subject Matter Expert (SME) responsible for CEDIA University core curriculum course development in the areas of data communication protocols, system integration methods, and residential integration project management.
  • Taught both technical and business seminars for CEDIA on the reliability of data communication protocols and product pricing practices.
  • Author of "A Case Study in Website Maintenance (CMS) Using XML", 2002.
  • Author of OS/2 Magazine article on a patented distributed parallel processing technology, 1992.
  • Co-author of four published academic papers and director of an educational videotape in the field of metallurgy, 1984.
  • Private Pilots License, 1989.
  • IEEE Member since 1981.
Manager Software Engineering January 2020 - Present
Principal Software Engineer July 2018 - December 2019
Capital One Financial Corp. Richmond, VA
Lead design and development of software in support of a Capital One Extract, Transform, Load (ETL) framework ingesting from and emitting to files, message streams, and databases. Most work is in Java with heavy reliance upon the Spark, Kafka, and Hadoop ecosystems.
Instrumental in re-architecting software to independent plug-and-play modules using standard interfaces for configuration and construction of transform pipelines. Significantly increased the flexibility in constructing the transformation pipelines using RDD, DStream, and Dataset processing modes as well as a non-Spark based pipeline.
Respected, sought out mentor for associates at levels both above and below mine from multiple teams. Exposure to Scala, Python, and machine learning technologies.
Manager Software Engineering January 2013 - January 2018
NETSCOUT Systems Inc. Marlton, NJ
Management responsibilities included feature, project, team, and release management, prioritization of defect reports from quality assurance, and handling of the rare customer escalation. Negotiated release content with upper management and product management to ensure successful product releases supporting $70MM in annual revenues.
Recently completed transitioning the control plane from a Java-based UI to a web-based UI utilizing REST API, Angular.js, and an Apache Tomcat Java backend requiring the migration of the team to new technologies, development environments, and agile processes.
Additionally, over the years introduced modern source control, continuous integration processes, and multiple automated testing suites.
Technically contributed to all levels of the technology stack for NETSCOUT's Packet Flow Switch (PFS) product line including the newly released Web UI described above and the original Java UI communicating with TCP/IP to a dedicated C++ backend. Both the new and original systems provide distributed control of multiple packet flow switches by multiple users.
Embedded Software Engineering Consultant October 2011 - January 2012
PMD Healthcare Allentown, PA
Provided timely embedded programming support for PMD Healthcare's new personal spirometer, Spiro PD. Implemented PDF report generation, bitmap conversion including color map reduction algorithms, various sorting routines, and minor GUI features.
Introduced the technique of cross-compiling an embedded application under Microsoft Visual Studio with minimal porting of freeRTOS. This resulted in greatly enhanced debugging capabilities quickly identifying and eliminating code defects before market delivery.
Primary development environment was the Renesas High-performance Embedded Workshop (HEW) for the H8SX processor family.
ASIC Design Verification Consultant August 2007 - March 2009
InterDigital Communications Corp. King of Prussia, PA
Developed co-verification test cases exercising high- and low-level UMTS functionality of the Register Transfer Level (RTL) System on Chip (SoC) design.
Primary architect and developer of a hardware abstraction layer (HAL) to support applications on multiple simulation platforms.
Ported the ASIC system-level test bench software to the SoC Designer environment creating additional SoC Designer components as necessary.
Simulation environments included Mentor ModelSim and QuestaSim and Carbon Design Systems SoC Designer (formerly owned by ARM) and Carbon Model Studio.
Application programming was in C; hardware design used a number of hardware description languages including VHDL, Verilog, System Verilog with the Direct Programming Interface (DPI), and SystemC. Rational ClearCase provided source code management.
Embedded Software Engineering Consultant July 2006 - July 2007
Sycamore Networks Corp. Moorestown, NJ
Merged ten branches of source code (while changing compilers as well) into a single unified version in approximately three weeks – well ahead of client's schedule.
Led the effort to correct and eliminate over 320 defects – a number of which were known for years but considered unfixable.
Improved the user interface (UI) menus for clarity and consistency of usage.
Researched and selected a Secure Shell (SSH) library and demonstrated fully integrated SSH functionality in six weeks.
Throughout the year-long assignment, provided immediate and timely resolution to customer issues working closely with customers and the field service team.
Programming was in C++. Debugging accomplished with JTAG in-circuit emulators (ICE). Source control provided by Visual SourceSafe.
Embedded Software Engineering Consultant November 2003 - June 2005
McData Corp. Lumberton, NJ
Designed and developed algorithms for the efficient routing of high-speed Fiber Channel (FC) data in accordance with user-configurable constraints.
Designed and developed high-reliability infrastructure classes to communicate user constraints among multiple distributed processors.
Increased efficiency of multiple engineering teams by developing software emulation classes for the ASIC routing module providing more accurate hardware emulation for the PC software test environment.
Embedded environment used multiple redundant processes distributed across many Power PC microprocessors running the Enea OSE operating system.
Development environment relied heavily on Rational Rose UML Modeling, C++, STL, Greenhills compilers and build environments, and PVCS source control.